The present technology relates to a signal processing unit, a signal processing method, an image pickup device, and an image pickup apparatus. In particular, the technology relates to a signal processing unit, a signal processing method, an image pickup device, and an image pickup apparatus capable of more accurately achieving a desired frame rate.
In a typical existing image sensor, charge accumulated in a light receiving section (photodiode) is read as a signal voltage, and is subjected to analog-to-digital (A/D) conversion. The charge read from the light receiving section of each of unit pixels arranged in arrays is subjected to A/D conversion by an A/D converter (also referred to as analog digital converter (ADC)) prepared for each column. Each A/D converter sequentially processes charge read from a unit pixel on each of rows along a column corresponding thereto. That is, charge read from each unit pixel of the pixel array is processed on a row basis.
In other words, charge read operation from each unit pixel is performed every row of the pixel array. Timing of processing on such read of each row is controlled based on a horizontal synchronizing signal. Specifically, length of a horizontal synchronizing signal corresponding to the total number of rows of the pixel array and rows in a blanking period corresponds to processing time for one frame. In other words, a frame rate is allowed to be controlled through control of the length of the horizontal synchronizing signal.
For example, the horizontal synchronizing signal may be generated based on an internal clock generated by multiplication and/or dividing of an externally supplied clock (for example, see Japanese Patent No. 4655500).